Design of Automotive Video and Graphics Control System Based on FPGA

LCD monitors are so ubiquitous that you can see them in homes, supermarkets, stadiums and cars. Undoubtedly, the car LCD display system is the fastest growing market. The drivers of growth include: declining display prices, increasing user experience, more product performance, and the accumulation of consumer products in the car.

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Typical graphics display systems are typically built using standard Application Specific Standard Processors (ASSPs) or custom Application Specific Integrated Circuits (ASICs) as controllers. But automotive graphic designers have had a lot of trouble building systems with these devices, including a shorter product lifecycle, a PC-based system bus interface, and the inability to adapt to new standards and new display types. All of these problems limit the possibility of reuse in design in other applications.

Figure 1 shows a typical example of an in-vehicle graphics/video system. The left side of the figure lists some of the different input signals used to drive the graphics system. This example includes a MediaLB interface, a two-wire pixel link transceiver for video, a common system interface bus and an NTSC/PAL video encoder. Once the video and graphics information enters the system, it is processed by the general purpose CPU or sent directly to the graphics processor under a different system architecture. In addition, most designs also include flash memory for program storage and SDRAM for storing page and video information.

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Figure 1: Typical graphics/video system architecture.

The graphics processor can be an ASSP, a custom ASIC, or a field programmable gate array (FPGA) device. Depending on the implementation, a system may contain multiple displays (as shown), and additional logic resources are needed to manage the various signals to support each display.

As mentioned above, designers encounter some obstacles when using ASSP graphics controllers in automotive design, including:

1. PCs and consumer electronics typically have a very short life cycle, but the automotive market has a long production cycle and support requirements that are not acceptable for changes that are forced at the end of the life cycle.

2. Hard-wired ASSP or ASIC devices do not support emerging or derived video and image standards as traditional systems do.

3. Hard-wired systems are also difficult to adapt to different display types, and their incompatibility is reflected in resolution, aspect ratio, or display signal interface.

4. Most ASSP devices use PC bus interfaces such as AGP, PCI, and PCI Express. If a custom interface is to be built between the internal system bus and the ASSP graphics device, automotive designers will also face additional cost and complexity issues.

The ASIC's single-chip price is indeed quite low, but the development cost is very high. The mask costs millions of dollars, and if you need to change the design to support new standards or new features, the mask cost will have to multiply.

Multi-purpose FPGA devices with commercialized intellectual property (IP) enable virtually all graphics system functions, including video controllers, RISC processors, display interfaces, bus standards, and different video input standards. All functions can be integrated on one device.

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Figure 2: Integrated in-vehicle graphics solution.

Figure 2 is an example of high integration implemented using an FPGA. This design eliminates the need for an external MediaLB device and instead handles the MediaLB protocol in internal FPGA logic. The RISC processor is integrated in the form of an IP-based 32-bit soft core processor. Together with the graphics/video kernel module IP, a complete design is implemented, including support for touch screen input, LCD backlight control, memory controller and multiple displays. This design greatly reduces the number of components in the design by integrating all major system functions into the FPGA. Using an FPGA with built-in non-volatile boot memory also saves on many more devices.

The hardware implementation of the graphics system is part of the overall project. Designers must focus on the functionality of the graphics controller to find the best solution for the device. For example, a customer information display (CID) may only need to display text messages and basic graphics, while a series of glass dashboards require a high resolution smooth graphical display because it actually represents the replacement of physical metrics and instrumental measurements with CIDs. Some instrument panels and navigation systems also have real-time video displays to support rear-view camera video, which requires a graphics controller that supports picture-in-picture and live video without degrading other image quality. In addition, the flexibility required to handle multiple video streams and inputs is also a typical requirement.

There are a number of questions to answer before implementing a graphics system, as each affects the final hardware and IP core implementation. These issues include:

1. Is the data source a video stream, a graphically provided output, or a combination of both, or both? If it is a video stream, how many channels of video, what is the resolution?

2. Is the final image 2D or 3D?

3. Which display technology is used, is it LCD? Plasma? Or video? How many monitors in total, what is the resolution?

4. What kind of application software interface is used, and how convenient is it to use?

5. Does the application require an extensible architecture to accommodate future growth and product grading?

6. Need to support multiple video pages? How much do you need if you need it?

7. Need to support image scaling? What is the rate? If you want to zoom, you also need to have a clip function.

8. Need Bitblit to support high-speed graphics performance? Does the design require horizontal and vertical Bitblit selection?

9. What kind of memory and bus interface does the system need?

10. Finally, is there a need to support future system expansion?

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Figure 3: Video and graphics IP content.

Figure 3 shows an example of a modular 2D graphics and video IP core. This IP represents the features and features that the current FPGA graphics IP core can provide. This high-speed graphics core was developed specifically for embedding into an FPGA system. Its memory controller can be connected to SDRAM or DDRAM, depending on application performance and cost budget. This IP core comes with optional video input and bitblit modules that can be configured with the specific features and functions required for the design. The display controller can control a single or dual display using any display technology. This core has a common internal 32-bit AMBA bus that can be easily interfaced with other internal IP cores or connected to external logic via FPGA I/O.

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Figure 4: Graphics and video controller module.

A complete FPGA graphics and video module is shown in Figure 4. Due to the adoption of the FPGA graphics processing solution, the physical size is small and the number of components is small. The module measures only 70x50 mm and can operate from a single 3.3V supply.

The on-board graphics display solution designed with FPGA devices mitigates the problems faced by ASSP and ASIC solutions. The FPGA solution makes module design development easier and provides the flexibility to integrate different IP modules, depending on the cost and functional requirements of the system. The FPGA achieves high integration of the design, which reduces board area and reduces component count. The long life of the FPGA device also guarantees a long life cycle of the product. Most FPGAs are field-upgradeable (some devices can even be upgraded while working), so new standards and new features can be easily supported.

Standard video and graphics IP for FPGAs provide tested and proven designs that can be easily integrated into graphics solutions. Leveraging packaged IP solutions also accelerates system development, allowing engineers to focus on application development rather than on low-level interfaces and graphics engines. The modular graphics IP core also allows the design to include custom graphics accelerators in the video controller. In this way, the designer can make special adjustments and optimizations to the graphics processing performance for the target system.

FPGAs also offer versatility to include the best bus and interface standards. This allows the system architecture to be designed for the best interface for the entire system, rather than just designing around the graphics processor interface or bus. The design of the FPGA allows the system designer to complete the control through the system interface: the entire design can be optimized to support real-time control and display systems, and the processing of the video stream does not affect system performance.

In addition, FPGA manufacturing supports density migration within the same package size, allowing more logic to be added to improve performance, or reducing logic capacity to reduce functionality without affecting the PCB layout. Development, production, maintenance and logistics costs can be reduced through density migration.

The AEC-Q100 Grade-2 certified FPGA family is available now, and several additional features and low cost devices will be available in early 2008. The latest products offer true DSP blocks and single-die non-volatile on-board flash memory that can be used to store content in internal memory when power is lost. In the past, designers felt that the cost of using FPGAs in automotive systems was too high, but today FPGA costs have been reduced and functions are more powerful, making FPGA single-chip prices highly competitive with other graphics solutions.

Building video and graphics controllers with FPGA devices also enables designers to enhance graphics display technology in other applications. By replacing the PC-related graphics controller with an AEC-Q100 Grade-2 compliant FPGA device in automotive applications, the product life is much longer than the current ASSP solution's two to three years.

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